The Chip Multiprocessors (CMPs) architecture moves from multi-core to many-core architecture to provide higher computing performance, and more reliable systems. Moreover, the CMPs trend also move from 2D CMPs to 3D CMPs architecture in order to obtain higher performance, more reliability, reduced cache access latency, and increased cache bandwidth when compared with 2D CMPs. Therefore, in this work we present a 3D many-core CMP architecture which executes heavy loaded tasks in order to improve the system performance. However, executing heavy loaded tasks demands increasing in system power consumption which results in increasing the on-chip thermal hotspots. The thermal hotspots in the 3D many-core CMPs cause performance degradation, reducing reliability, decreasing the chip life spam. Therefore, Runtime Thermal Management (RTM) in the 3D many-core CMPs has become crucial to control the thermal hotspots without any performance degradation. In this paper, a new runtime task migration technique is proposed to control hotspots in the 3D many-core CMPs. The proposed technique migrates the hottest tile with the optimal coldest tile in the core layer. The optimal coldest tileis selected by considering theDynamic Random Access Memory (DRAM) banks' access distribution level in the cache layer. The simulation results indicate up to 33℃ (on average 13℃) reduction in the cores' temperature of the target 3D many-core CMP. Moreover, the proposed technique efficiency is clarified in the simulation results that the maximum temperature of cores in the core and cache layers are both less than the maximum temperature limit, 80.
